STM32MP15 ROM code overview: Revision history

14 October 2020

• curprev16:0316:03, 14 October 2020m38,336 bytes-267→ Flash memory boot
  Approved on 08:21, 20 October 2020
• curprev16:0316:03, 14 October 2020m38,603 bytes-216→ Device states
• curprev16:0216:02, 14 October 2020m38,819 bytes-284No edit summary

11 June 2020

• curprev08:0508:05, 11 June 2020m39,103 bytes0→ Wake up from low power modes

3 March 2020

• curprev08:2708:27, 3 March 202039,103 bytes0No edit summary

20 February 2020

• curprev14:5014:50, 20 February 2020m39,103 bytes+216→ Device states
• curprev14:4514:45, 20 February 2020m38,887 bytes+286No edit summary
• curprev14:4314:43, 20 February 2020m38,601 bytes+1→ STGEN
• curprev14:4214:42, 20 February 2020m38,600 bytes+45→ Serial boot
• curprev10:1110:11, 20 February 2020m38,555 bytes-28→ Secondary core boot

29 January 2020

• curprev16:1216:12, 29 January 202038,583 bytes+80→ Debug and Error messages
• curprev14:1814:18, 29 January 202038,503 bytes-139→ OTP WORD 24 to 31 - Public Key Hash (PKH)

27 January 2020

• curprev09:2509:25, 27 January 2020m38,642 bytes+207No edit summary

7 January 2020

• curprev10:1310:13, 7 January 202038,435 bytes+111→ RCC
• curprev10:0610:06, 7 January 202038,324 bytes+297→ System and Peripheral registers modification after boot sequence
• curprev10:0010:00, 7 January 202038,027 bytes+65No edit summary
• curprev09:5909:59, 7 January 202037,962 bytes+1,989→ RCC settings
• curprev09:3809:38, 7 January 2020m35,973 bytes-2No edit summary
• curprev09:3709:37, 7 January 2020m35,975 bytes+22No edit summary

6 January 2020

• curprev15:5215:52, 6 January 202035,953 bytes+41→ Flash memory boot

5 December 2019

• curprev13:1013:10, 5 December 2019m35,912 bytes0corrected trace address range

11 October 2019

• curprev13:3413:34, 11 October 201935,912 bytes+267No edit summary

10 October 2019

• curprev11:3711:37, 10 October 2019m35,645 bytes+5→ Secondary core boot
• curprev11:3711:37, 10 October 2019m35,640 bytes+19→ Secondary core boot
• curprev11:3411:34, 10 October 2019m35,621 bytes-224→ OTP WORD 9 - NAND configuration
• curprev11:3311:33, 10 October 2019m35,845 bytes-170→ ROM code features
• curprev09:1709:17, 10 October 201936,015 bytes+754→ Secondary core boot
• curprev08:5808:58, 10 October 201935,261 bytes+105No edit summary
• curprev08:3708:37, 10 October 201935,156 bytes+65→ OTP WORD 9 - NAND configuration

3 October 2019

• curprev08:5108:51, 3 October 2019m35,091 bytes+2No edit summary
• curprev08:0708:07, 3 October 201935,089 bytes+4→ Engineering boot

27 August 2019

• curprev08:5808:58, 27 August 2019m35,085 bytes+224→ OTP WORD 9 - NAND configuration

6 August 2019

• curprev13:4913:49, 6 August 2019m34,861 bytes-793Removed unnecessary last part of table...repeating itself
• curprev13:4613:46, 6 August 2019m35,654 bytes0Word cannot have 33 bits, simply doesn't fly.
• curprev13:4513:45, 6 August 2019m35,654 bytes-3Dates were inserted for bits 11-8 and 7-4 (Excel copy error?)

23 April 2019

• curprev08:1108:11, 23 April 2019m35,657 bytes+170→ ROM code features

19 March 2019

• curprev07:4907:49, 19 March 2019m35,487 bytes-3UART5 instead of USART5

12 March 2019

• curprev16:5216:52, 12 March 2019m35,490 bytes-1→ OTP WORD 5 to 7 - AFmux configuration
• curprev16:5116:51, 12 March 2019m35,491 bytes-1→ OTP WORD 5 to 7 - AFmux configuration

19 February 2019

• curprev09:0109:01, 19 February 2019m35,492 bytes+10No edit summary
  Approved on 18:33, 19 February 2019

1 February 2019

• curprev14:1114:11, 1 February 2019m35,482 bytes+35,235No edit summary

28 January 2019

• curprev16:3116:31, 28 January 2019247 bytes+247Created page with "<noinclude> {{ArticleMainWriter|EricS}} {{ArticleApprovedVersion | Jean-ChristopheT | Nobody | No previous approved version | Automatic approval (article under construction) |..."