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<div><big><big><big>'''Introduction'''</big></big></big><br><br />
-----<br />
This article covers general aspects of designing power supplies for STM32 MCUs. You will find general guidelines on how to choose components, elements to take care of and optional features related to power supplies.<br />
<br />
The first part is about power supplies in general. <br />
*Define main characteristics of power supplies and impacts on applications.<br />
*Talk about types SMPS and LDO and compare them. <br />
*Provide important power management considerations. <br />
<br />
The second part specifies STM32 requirements regarding PS. <br />
*Power architecture of STM32.<br />
*STM32 specific requirements regarding power supplies.<br />
*How to identify the requirements of the application. <br />
*Included features in STM32.<br />
<br />
== General notions power supply ==<br />
Power supply quality is fundamental for reliability of any electronic application. The purpose of this section is to get an overview of considerations about power supplies.<br />
<br />
Ideally electronic application should be supplied with a fixed voltage, response very fast to current call and without any noise.<br />
<br />
Applications are powered by an external source of electricity that can be a battery, a USB cable, or AC current for example. These sources can be noisy, especially if they supply power applications such as motors. Furthermore, the voltage can vary a lot, in the case of batteries depending on the charge and loading current.<br />
<br />
The role of the power supply is to generate a steady supply voltage for the application, independent from the input voltage and output current variations. In this document a difference is made between power source and power supply. <br />
<br />
<u>Application</u>: Scope of the engineering process.<br><br />
<u>Power source</u>: External energy source given with certain characteristics. Outside of the application.<br><br />
<u>Power supply</u>: System that converts voltage from power source to the load that must match power source and load characteristics. Inside the application.<br><br />
<u>Load</u>: All the component that draws current from the power supply.<br><br />
[[File:Example_of_application_with_power_sourcesupplies_and_loads.svg|600px|thumb|center| Example of application with power source/supplies and loads]]<br />
<br />
For more information about supplies topology for a wide variety of applications and components references see this guide:Power managment guide [https://www.st.com/resource/en/brochure/power-management-guide.pdf Power managment guide]<br />
<br />
As current exists in two major forms, Alternative (AC) and Continuous (DC) power supplies are categorized by their type of conversion AC/DC, DC/DC, DC/AC (invertor) and AC/AC. '''In this topic we will only cover DC/DC.''' <br />
<br />
=== General definitions ===<br />
[[File:illustrating_voltage_current_notions.svg|600px|thumb|center| illustrating voltage current notions]]<br />
==== Voltage ====<br />
;Input Voltage <!-- ===== --><br />
Supplies are designed to handle a range of input voltage, see absolute maximum rating. If voltage spikes from the power source exceed this limit, it could lead to destruction of the power supply, and the whole application. Chosen component must handle highest voltage spikes and not only the average voltage. Even short spikes can damage components.<br />
<br />
;Output Voltage <!-- ===== --><br />
The component datasheet provides a range of operating voltage. The IC might not work properly if applying insufficient voltage, on the other hand exceeding maximum value may lead to irreversible damage. <br />
==== Current ====<br />
;Max continuous current <!-- ===== --><br />
Max continuous current corresponds to the consumption of the load in the worst-case scenario. The power supply must be able to provide this much current continuously. This gives the minimum requirement for the power supply max continuous current.<br />
;Peak current <!-- ===== --><br />
Peak currents are short time current spikes that occur in transient phases like power up, clock frequency shifting, high load I/O switching.<br />
;Inrush current <br />
<span id="Inrush current"></span><br />
In addition, the circuit contains capacitors. At power up these capacitors draws a huge amount of current to charge, this must be handled by the power supply.<br />
;Average current <!-- ===== --><br />
Average current is helpful to estimate energy consumption and size finite or limited power source, like battery, to guarantee lifetime. It is also possible to have a power supply that only delivers the average current and use local electricity storage like capacitors to absorb transient currents.<br />
[[File:current_consumption_characteristics.svg|600px|thumb|center| current consumption characteristics]]<br />
<br />
;Quiescent current (IQ) <!-- ===== --><br />
Quiescent current, ''I<sub>Q</sub>'', is the consumption of the power supply itself. This may be negligible with medium or high currents but becomes '''significant in low power applications.'''<br />
==== Noise ====<br />
<span id="Noise"></span><br />
This section only talks about noise as choosing criteria for supply, refer to section [[#Power management Decoupling]] to get more information about noise in general and good practice.<br />
<br>Some applications are especially sensitive to noise like precision analogue devices or high frequency digital ICs.<br />
There are different notions related to noise regarding power supply:<br />
;Intrinsic noise <!-- ===== --> <br />
<span id="Noise Intrinsic"></span><br />
Physical properties of transistors and resistors implies noise. This source of noise is independent of input, it is generated by the regulator itself, in particular the retroaction loop. <br />
;Switching ripple (SMPS) <!-- ===== --> <br />
<span id="Noise Ripple"></span><br />
In SMPS [[#Power supply SMPS]], the voltage regulation is done by switching a transistor at high-speed rate (~50kHz-2MHz), this induces voltage variation on output. The amplitude of the ripple mainly depends on the size of the inductance, the output capacitor and output current.<br />
This constitutes the main disadvantage of SMPS. <br />
;Power-Supply Rejection Ratio (PSRR) <!-- ===== --> <br />
<span id="Noise PSRR"></span><br />
PSRR is the ability of the power supply to reject input noise, coming from the power source. It’s like the power supply acts as a filter. PSRR value is often given in datasheets. This is an important characteristic for low noise applications. <br />
==== Efficiency ====<br />
In high power application, power loss represents a significative amount of energy which is dissipated in heat. Taking care of efficiency initially represents a cost but might become a gain while consuming less energy and increasing reliability due to less current and heat.<br><br />
In ultra-low power applications, running on battery or induced current (RFID), efficiency is key to ensure high lifetime.<br />
<br />
=== Types of power supply ===<br />
In DC/DC conversion, there are two major methods, linear regulator and SMPS (Switching Mode Power Supply).<br />
<br />
==== Low Drop output (LDO) ==== <br />
<span id="power supply LDO"></span><br />
Linear regulators are a '''low cost''' and '''easy''' way to regulate voltage. These are only step-down regulation with a minimal drop voltage ''V<sub>in</sub>-V<sub>out</sub><V<sub>drop</sub>''. <br><br />
Low dropout regulators, LOD, are linear regulators with a low Vdrop, about 100mV-500mV, which allow output voltage very close to the input voltage.<br />
<br />
The regulator itself doesn’t introduce much [[#Noise|noise]] relatively from [[#Power supply SMPS|SMPS]]. Thanks to that, LDOs have '''good output voltage accuracy''' and are preferred for '''low noise application'''. These are characterized by their intrinsics noise and PSRR. <br />
<br />
To regulate output voltage, LDO dissipates the difference in heat. ''P<sub>dissipated</sub>=(V<sub>in</sub>-V<sub>out</sub> )*I''. The '''major drawback is efficiency''', ''α≅V<sub>out</sub>/V<sub>in</sub> (if I<sub>Q</sub>≪I<sub>out</sub>)'', especially when the difference between Vin and Vout is huge. Because of that they are not recommended for 1 amp or higher current applications. Otherwise make sure to have proper thermal dissipation. <br><br />
'''Note:''' in low current application quiescent current, IQ, of the LDO might become significative: ''α≅(V<sub>out</sub>*I<sub>out</sub>)/(V<sub>in</sub>*I<sub>in</sub> ) , I<sub>in</sub>=I<sub>out</sub>+I<sub>Q</sub>''<br />
<br />
[[File:LDO_Implementation_schematic_example_STLQ020_ST_DS12072_Rev4_p4.svg|600px|thumb|center| LDO Implementation schematic example, STLQ020]]<br />
<br />
These types of power supplies are generally fully integrated and only '''require few simple components''' like resistor or capacitor.<br><br />
''Note:''' Input current is equal to output current plus the quiescent current, current consumed by the LDO itself. The input current is not influenced by the voltage drop as LDO dissipates this drop in heat.<br />
<br />
==== SMPS ==== <br />
<span id="Power supply SMPS"></span><br />
Switching Mode Power Supplies are the most efficient way to regulate voltage, '''up to 90% of efficiency'''. <br><br />
They are composed with switches, transistors and diodes, that chops the current and a strong L/C filter that convert chopped to continuous current and voltage.<br><br />
There is different topology of SMPS, the most common is step-down Buck regulator.<br />
[[File:Basic_synchronous_Buck_convertor.svg|600px|thumb|center| Simplyfied synchronous Buck convertor schematic]]<br />
<br />
The switching transistors generate '''[[#Noise Ripple|ripple]]''' which is basically '''noise''' on Vout<!-- that leads to '''less accurate output voltage''' [[#Noise]]-->. <br><br />
'''Note:''' [[#Noise |PSRR]] is not relevant concerning SMPS<br><br />
'''Note:''' There is low noise SMPS that are designed to have small ripple but this lower the efficiency.<br><br />
[[File:Output_ripple_buck_SMPS.png|600px|thumb|center|Example of output ripple buck SMPS]]<br />
<br />
These types of power supplies are generally '''more expensive''' and take '''more place on PCB'''. It requires bigger capacitors and an inductor.<br />
[[File:SMPS_Implementation_schematic_example_L7983ST_ST_DS13354_Rev1_p11.svg|600px|thumb|center| SMPS Implementation schematic example, L7983]]<br />
<br />
SMPS are efficient in a certain range of power, so an over dimensioned SMPS is not only more expensive but also less efficient.<br />
[[File:L7983_SMPS_Efficiency_example_ST_DS13354_Rev1_p31.svg|600px|thumb|center| L7983 SMPS Efficiency example]]<br />
<br />
''Note:''' No like LDO, input current is equal to ''V<sub>out</sub>/V<sub>in</sub> *I<sub>out</sub>/α'' plus the current consumed by the SMPS itself. The input current is smaller as the voltage drop is higher as the SMPS converts power with minimal dissipation.<br><br />
''Note:''' As SMPS requires more capacitors, '''the [[#Inrush current|inrush current]] is bigger''' (2..<br />
<br />
==== Comparing SMPS/LDO ====<br />
SMPS are more efficient than LDO, especialy with big input/output votage difference.<br><br />
LDO are low cost and easy to implement, where SMPS requires a coil and more space on PCB. <br><br />
LDO generates less noise than SMPS.<br><br />
High PSRR LDO can be used on the output of a SMPS to reduce switching noise while achieving a good eficiency.<br />
<br />
=== Power management ===<br />
==== Decoupling ==== <br />
<span id="Power management Decoupling"></span><br />
Noise is a large field that includes many different notions. In the case of power supply path, noise is variation of supply voltage. It is mainly introduced by load(current) variations and power conversion (LDO/SMPS…). <br />
<br />
* Load current transient : Digital IC, motor control, communication IC, and most of loads induces current variations. Any conductor has parasitic resistance and inductance that oppose to current variations. This result to voltage drop/peek across power lines. See illustrated below voltage drop induces by current variation in a inductance: <br />
[[File:coil_voltage_drop.png|600px|thumb|center| coil voltage drop]]<br />
* Not perfect power supplies regulation: The active regulation as a latency to current variations. The retroactive loop introduces noise by measurement errors. In the case of SMPS there is also the ripple due to switching, see [[#Noise]] section for more details.<br />
* Power source : The third thing to consider is that the power source itself can be noisy for some reasons that are often out of control. Filtering can be required.<br />
<br />
;Decoupling/Bypass capacitors <!-- ===== --><br />
Decoupling consists of placing energy storage on different nodes of the power supply grid to locally supply these transient currents. These energy storages are capacitors placed as close as possible to transient generating circuits. The goal is to minimize the size of current loops to minimize parasitic resistors and inductance. <br />
[[File:Schematic_line_inductance_decoupling.png|600px|thumb|center|Schematic line inductance + decoupling]]<br />
[[File:Frequency_response_line_inductance_decoupling.png|600px|thumb|center| Frequency response line inductance + decoupling]]<br />
You can see, on Figure above, frequency response with different decoupling capacitor. Serial coil amplify high frequencies, decoupling capacitor cuts this amplification, the drawback is resonance frequency. <br />
<br />
<br>The second trouble is '''equivalent serial inductance (ESL)'''. Al component has parasitic inductances capacitance and resistance. Figure below represent a common realistic capacitor model, in the case of decoupling we will focus on ESL.<br />
Capacitor ESL depend mainly on technology and package type and size. <br />
[[File:Capacitor_equivalent_model.svg|300px|thumb|center| Capacitor equivalent model]]<br />
See on Figure below, that decoupling capacitors filter medium frequencies, but ESL effect take over at high frequencies.<br />
[[File:Frequency_response_line_inductance_decoupling_ESL.png|600px|thumb|center| Frequency response line inductance + decoupling + ESL]]<br />
As bigger capacitors has higher ESL due to bigger package, it is recommended to mix different size of capacitors to cover the widest band as shown in Figure below. Furthermore, placing multiple capacitors in parallel reduces equivalent serial inductance as ''L1//L1=(L1*L1)/(L1+L1) =L1/2.''<br />
[[File:Schematic_combined_capacitor_decoupling.png|600px|thumb|center| Schematic combined capacitor decoupling]]<br />
[[File:Frequency_response_combined_capacitor_decoupling.png|600px|thumb|center| Frequency response combined capacitor decoupling ]]<br />
<br />
For digital ICs like MCU, put a capacitor as close as possible of each Vdd/Vss pin pair. If Vdd pins are not close to Vss pins, put the capacitor close to Vdd and directly to the ground plan. <br />
[[File:Short_current_loop_ST_AN5307_Rev_6_p_32.svg|300px|thumb|center| Short current loop; ST, AN5307 Rev 6; 2022, p 32]]<br />
'''It is important to select low ESR/ESL capacitors''' (equivalent serial resistance/inductance). Especially use ceramic SMD with the smallest package for a given capacitance. A bigger package has bigger ESL and ESR.<br />
<br />
;Bulk capacitors <!-- ===== --><br />
Bulk capacitors provide energy to the system to prevent voltage drops, they are generally big capacitance and placed around the power supply. <br />
<br>In fact, the difference between decoupling, bypass and bulk capacitor is not clear, all are used to stabilize voltage. Roughly bulk capacitors have bigger capacitance and provides mor current for a longer period (filter lower frequencies).<br />
<br />
In addition, for power supplies, these capacitors play '''two others major roles:'''<br />
* Filter noise from the power supply itself, especially SMPS, and noise replicated from the power source. <br />
* Power supply has feedback loops regulations that needs capacitors to reman stable and accurate.<br />
It is important to respect power supplies datasheets recommendations about capacitors values.<br />
<br />
<br>'''In conclusion''' capacitors play important roles in supply path. It is important to pay attention to decoupling and PCB layout. Due to parasitic inductances in lines and capacitors and variety of frequencies to filter, one big capacitor is '''not''' equivalent to properly sized one’s placed at different places of the circuit.<br />
Each component datasheet provides recommendations. <br />
<br />
==== Over current protection ====<br />
Most simple power supplies do not have any current management. <br />
In the case of short circuit or low impedance load, this can lead to destructive current for the power supply or the load. <br />
Furthermore, in some cases there are current limitations from the power source. To avoid risks it is recommended to choose a power supply with a current protection feature.<br />
;Over current cut off <!-- ===== --><br />
A simple solution is monitoring the current and cutting power supply when it reaches the limit. It is a simple and efficient solution, however if threshold is too low, it can be triggered by current spike like inrush current.<br />
;Current limiting <!-- ===== --><br />
<span id="Current limiting"></span><br />
Some power supplies can limit current by lowering voltage. This protects against short circuits and can be used to limit inrush current. It has the advantage of not cut of completely in case of transient spike of current. On the other hand, this requires a good [[#Power supply supervisor]] to reset ICs when voltage is too low to prevent malfunction.<br />
<br>A current limiting can lead to ripple around the startup voltage of ICs. When VDD passes over POR threshold (), reset is released, and the IC starts to boot. If the current call is too high, the limiting current lowers the voltage, eventually enough to go back under PDR threshold. This can be repeated multiple times until capacitors are charged enough.<br />
[[File:current_limiting_ripple_on_startup.svg|400px|thumb|center| Ripple current limiting startup]]<br />
<br />
==== Soft start ====<br />
<span id="Soft start"></span><br />
Soft start is another way to control inrush current. It consists of a controlled, slow voltage rising ramp. <br />
<br />
Example components:<br />
* L7983 is a SMPS controller which include a soft start feature, the output voltage rises in 2 ms: DS13354 - Rev 1, ch 5.4, p17.<br />
* LD59150 is a LDO with a programmable soft start and a power good signal: DS12455 - Rev 7, ch 6.2, p8.<br />
<br />
==== Over voltage protection (OVLO) ====<br />
Overvoltage lockout (OVLO) feature cuts output power when voltage reaches an overvoltage threshold. This prevents damaging the load in case of unexpectedly high input voltage.<br />
STBP120 is a power supervisor IC that provides multiple features including OVLO.<br />
==== Under voltage lockout (UVLO) ====<br />
Under voltage lockout consist of cutting output power when input voltage passes below a threshold. This prevents powering the load with intermediate voltage. The ST1PS03 is a buck convertor (SMPS) which include under voltage lockout.<br />
<br />
==== Power good ====<br />
Power good signal, can be provided either by the power supply itself or by a power monitor device, tells when voltage is high enough and stabilized. Is useful to keep reset an IC during supply start-up to play the role of internal [[#Power supply supervisor]]. It is also used enable another power supply to manage power one order for example ('''Error! Reference source not found.''').<br />
For example, LDL40 and LD59150 are LDO with an integrated PG feature.<br />
<br />
Here finds external power supervisor which implements some functionalities presented above: https://www.st.com/en/reset-and-supervisor-ics.html.<br />
<br />
==== Power on sequence ====<br />
<span id="Power on sequence"></span><br />
The power on sequence is the phase while the voltage is rising, and components power on. <br />
The application is often composed of multiple ICs which might have different startup voltage and delays. It is a good option to have a quick voltage rising ramp to prevent too much delay between two components startup.<br />
It is better to start from 0V with all circuits fully discharged with no residual voltages, see power-down sequence [["Power down sequence"]] for more information.<br />
The voltage curve should be monotonic and strictly rising.<br />
<br />
The rise time is conditioned by the total capacitance (in Farads) of the circuit (chip + decoupling + components) as well as the impedance of the power supply ''Z<sub>supply</sub>'' or the current limit ''i<sub>max</sub>.''<br />
<br />
If the inrush current is too high, the voltage may drop during rise, and not be strictly rising or the power supply can shut off if an over current protection is triggered. For more information see section [[#Current limiting]].<br />
<br />
==== Power down sequence ====<br />
<span id="Power down sequence"></span><br />
The importance of power down phase is frequently underestimated. It recommended to always keep a low impedance tied on Vdd, even for power down phase. To properly discharge all capacitance, pull Vdd to 0V with a low impedance.<br />
[[File:Vdd_falling_scenarios.svg|600px|thumb|center| Vdd falling scenarios.]]<br />
There are different methods to implement proper power down.<br />
<br />
;Passive resistor <!-- ===== --><br />
A resistor, RD places between VDD and GND discharge capacitors when power supply is off. Discharge time last about ''3*τ = 3*R*C, R= R<sub>D</sub>'' and ''C'' is the sum of all decoupling/bulk capacitors. This is a low-cost solution, but it consumes power permanently: ''P=(V<sub>dd</sub>^2)/R<sub>D</sub>'' . The lower the pull-down resistor, the quicker the discharge and higher is the consumption.<br />
[[File:power_rail_discharge_resistor_schematic.svg|300px|thumb|center| power rail discharge resistor]]<br />
<br />
;Power monitor + Mos <!-- ===== --><br />
[[File:power_rail_discharge_transistor_schematic.svg|600px|thumb|center| power rail discharge transistor]]<br />
This solution uses a resistor in series with a transistor controlled by a '''inverted''' power good or enable signal. <br />
Two important elements to take care:<br />
* Ensure that Vdd rail is not powered when closing discharge switch, either by disabling the regulator or be sure that no more power source is connected. Otherwise, this lead to a huge current call.<br />
* The discharge switch gate needs to be held above ''Vgs'' threashold until ''Vdd'' rail reaches 0V. This can be chalenging if ''Vin'' drops quickly. Consider these parameters to ensure functional circuit:<br />
** Use a low ''V<sub>GS</sub>'' N-Channel MOSFET transistor.<br />
** Adding capacitor in the power monitor supply domain can help to keep it powered longer.<br />
** Use a lower resistor to discharge Vdd rail quicker.<br />
** Set a high Vin threshold to give more time margin.<br />
<br />
;Discreet circuit <!-- TODO discreet circuit ===== --><br />
<br />
;PS integrated discharge <!-- ===== --><br />
The most efficient way to implement this feature, is to use a fully integrated in power supply itself. This reduces overall complexity, conception time, number of components and used space on PCB.<br />
<br>Some power supplies, equipped with an enable feature, has an internal switch that ties the Vout line to ground when disabled. <br />
<br>For example, the STLQ020 is a LDO with an optional discharge feature through a ''100''Ω resistor when enable signal is low. <br />
<br>The ST1PS03 is a buck convertor (SMPS) which include output discharge feature. <br />
[[File:Output_discharge_feature_SMPS_ST2PS03_DS13206_Rev_4.png|600px|thumb|center| Output discharge feature SMPS; ST2PS03: DS13206 - Rev 4]]<br />
<br />
==== Components example ====<!-- TODO fill this section !!--><br />
<br />
* ST1PS02 SMPS regulator; It is a 400-mA buck regulator:<br />
** Adjustable output current limit<br />
** Power good signal<br />
** Constant current soft start <br />
** Output discharge<br />
** Under voltage protection<br />
* ST1L08 LDO regulator; It is a 800-mA high PSRR linear regulator:<br />
** Power good signal<br />
** Current limiter<br />
** Enable signal<br />
** Thermal protection<br />
* STEF05 eFuse:<br />
** Soft start<br />
** Output voltage clamp<br />
** Current limiting<br />
<br />
== STM32 ==<br />
=== Context ===<br />
STM32 microcontrollers are composed of different power domains. This has different purposes:<br />
* Have different operating voltage.<br />
* Have different power sources.<br />
* Shut down some parts to reduce consumption.<br />
* Isolate noise.<br />
* …<br />
<br />
Al STM32 have at least Vdd and Vdda input supplies.<br />
The '''main''' supply is called '''Vdd'''. On simplest products and/or smallest packages, this is used to supply the entire device except the analog part supplied by Vdda. Slightly more advanced products have other input power supplies dedicated to specific features.<br />
<br />
Internally STM32 are divided into different power domains. They can be isolated by power switches or regulators. Some parts can be completely unpowered when unused.<br />
<br />
=== Specific supplies configurations ===<br />
==== Vcore/Vcap ====<br />
[[File:Vcore_power_scheme_STM32H7_ST_AN4938_Rev_6.png|600px|thumb|center| Vcore power scheme STM32H7; AN4938 Rev 6]]<br />
<br />
'''Vcore''' supply CPU, memory, and some peripherals. This voltage is generally provided by an internal LDO. On some products, CPU voltage supply (Vcore) is externally accessible through Vcap pin, in this case there is different way to supply Vcore:<br />
[[File:Vcore_supply_sheme_RM0399_Rev_4_p274.svg|600px|thumb|center| Vcore supply configurations]] <br />
;Internal LDO <!-- ===== --><br />
1st configuration Vcore provided by the internal LDO supplied with Vdd. This requires decoupling capacitor on Vcap.<br />
;External regulator <!-- ===== --><br />
It is possible to externally supply Vcore through Vcap bypassing the internal LDO as shown in the 6th configuration.<br />
;Internal SMPS <!-- ===== --><br />
In some devices, an internal SMPS is available. It can be used to be more efficient. <br />
<br>The internal SMPS can supply directly Vcore to get the best efficiency, 2nd configuration. To reduce the ripple from SMPS, supply the Internal LDO by the SMPS. The SMPS output is about 100mV above Vcore, and the LDO filters the ripple. See 3rd configuration, or use an external regulator, see 5th configuration.<br />
<br />
==== Vdda Vref ====<br />
The analog power domain is isolated from the digital power domain to reduce the impact of switching noise. Analog components such as ADC, comparators, DAC are supplied by '''Vdda'''. <br />
<br>For sensitive applications, Vdda can be provided by a separate power supply like a low noise and high PSRR LDO. With a separate ground plane for the whole analog section. If not possible, the minimal recommendation is to isolate Vdda from Vdd with a ferrite bead in series.<br />
[[File:Example_ferrite_reference_design_STM32H7x3_ST_AN4938_Rev_6.png|600px|thumb|center|Example ferrite reference design STM32H7x3; AN4938 Rev 6]]<br />
<br />
The main sensitive point regarding noise is '''Vref''' which is the voltage reference used by analog component. This means that ADC measurement accuracy and noise (SNR) directly dependent on Vref. Vref is generally accessible through Vref+ pin.<br />
<br />
<br>Vref can be provided in different ways. <br />
* The simplest solution is to use Vdda. The smallest packages have Vref+ directly bounded to Vdda. Otherwise, it is possible to directly tie Vref+ and Vdda together. In this case, Vdda is more sensitive to noise and accuracy.<br />
* Some products embed an internal bandgap reference Vrefbuf which can provide a steady voltage reference which doesn’t rely on Vdda precision and is isolated from its noise.<br />
* Finally, it is possible to provide an external reference through Vref+ pin provided by a dedicated component.<br />
[[File:vref_buf_stm32u535cb_DS14217_rev4_p62.svg|600px|thumb|center|vref buf extract from stm32u535 satasheet DS14217 rev4 p62]]<br />
<br />
=== Power consumption factors ===<br />
==== CPU Mode ====<br />
CPU has different modes (Run, Sleep, Stop, Low power Run ...), that consume different amounts of current (note that all features are not available in low consumption modes). See this article for more information: https://wiki.st.com/stm32mcu/wiki/Getting_started_with_PWR.<br />
==== Peripherals ====<br />
Activated peripherals consume current, unused should be unpowered to reduce overall consumption. <br />
==== Voltage ====<br />
In some products, it is possible to modify the core voltage (VCORE VOS) and peripherals voltage to modulate the current, lower the voltage is, the less it consumes. The voltage scale affects operating conditions such as CPU frequency. <br />
==== Frequency ====<br />
Digital component consumption depends on the clock frequency, higher the clock speed is, higher the current. Lowering the CPU or peripheral clock frequency helps to reduce the current consumption. <br />
==== Temperature ====<br />
Physical properties of materials, especially resistivity, are affected by temperature. Digital IC '''consumes significantly more at high temperatures'''. <br />
==== low power ====<br />
STM32 have different operating mods (run, sleep, low power sleep, stop...) that enable/disable functionalities and change operating conditions. These are used to reduce power consumption when some features are not used by the application. <br />
<br />
'''Note: '''Keep in mind that waking up MCU from sleep or stop mods take time and consume current. It is longer to wakeup from deeper sleeping mod. Some parameters like clock frequency help to have a quicker wakeup at the price of a higher peek current.<br />
<br />
<br />
=== How to estimate consumption ===<br />
==== Stm32CubeMX Power Consumption Calculator (PCC) ====<br />
To estimate power consumption, Stm32CUBEMX software integrate a tool called '''Power Consumption Calculator''' (PCC). This is an interesting '''complementary''' tool to the manual approach presented in this chapter. '''See STM32 CubeMX User manual''' (UM1718) chapter 13 “Using the Power Consumption Calculator to optimize the embedded application consumption and more” to learn more. <br />
<br>Keep in mind that '''Datasheet values take precedence over PCC''' results. <br />
<br />
==== Configuration consumption ====<br />
Each element can be configured dynamically during application execution, this modifies consumption. The first step is estimating consumption of different configurations. <br />
<br>The first thing to look at is the CPU consumption. Datasheet usually gives system consumption with all peripherals disabled for different mode, clock, and memory configuration. The consumption includes Clock source, program memory and CPU. Note that datasheets usually give typical and maximum values at different temperatures.<br />
<br>'' '''Example:''' STM32F405rg in run mode, executing code from Flash memory, running at 90MHz with all peripherals disabled consume 20 mA in typical conditions at 25°C:''<br />
[[File:Extract_datasheet_STM32F405rg_ST_DS8626_Rev_9_p85.png|600px|thumb|center| Extract datasheet STM32F405rg; DS8626 Rev 9 p85]]<br />
<br />
Then look at each peripheral consumption depending on their configurations.<br />
<br>'' '''Example:''' STM32L073v8 in run mode, Range2 (Vcore = 1,5V), FHCL = 16MHz, FAPB2= 8MHz, the USART1 consume 11.5 µA/MHz so: 92µA in typical conditions:''<br />
[[File:Extract_datasheet_STM32L073v8_DS10685_Rev_7_p84.png|600px|thumb|center| Extract datasheet STM32L073v8; DS10685 Rev 7 p84]]<br />
<br />
The total consumption is the sum of all component’s consumption. As generally CPU value is given for the whole MCU except peripherals, add to this each activated peripherals consumption.<br />
<br />
==== Average current ====<br />
<br />
To calculate the average current, sum consumption of CPU for each configuration pondered with time ratio spend in it add to that consumption of each peripheral at given configuration pondered with use time ratio.<br />
The average current gives a long theme consumption, it relevant to estimate energy consumption and size a finite energy source like a battery.<br />
<br />
''I<sub>avg</sub>= ∑((CPU+Clock+Memory) * usage ratio) +∑(Peripheral consuption * usage ratio)'' <!-- TODO meilleur affichage de la formule --><br />
<br />
==== Maximum continuous current ====<br />
Take the configuration that consumes the most in application conditions. This value must be lower than the maximum continuous current characteristic of the power supply.<br />
==== Peak current ====<br />
<br />
;Inrush <!-- ===== --><br />
One of the main sources of peak current is inrush during power up. Supply voltage rise charge capacitors of the circuit and startup of ICs draws current. This represents a significative amount of energy. <br />
<br>The inrush current might be much higher than other currents spikes in operating conditions. To reduce the size of the power supply, it is possible to control inrush, either using a current limiting feature in the power supply or soft start, see [[#Soft start]] section for more information.<br />
<br>Three elements are related, total capacitance, rising time and peek current. Always remember that tuning one affects the others.<br />
<br>'''Note:''' This topic is related to rising time, see [[#Power on sequence]] section. The faster the voltage rises, the higher the current is.''i<sub>rush</sub>=C<sub>eq</sub>*dV<sub>dd</sub>/dt''<br />
''dV<sub>dd</sub>/dt'' rising rate ''C<sub>eq</sub>'' equivalent capacitance of the system, sum of all decoupling/bulk capacitor, capacitance of the different components/chip. <!-- TODO meilleur affichage de la formule --><br />
<br />
;Mode transition <!-- ===== --><br />
Transitioning between different run modes, low power modes, clock frequency, voltage ranges induce transient current that might be significative for sensitive applications.<br />
<!-- TODO apporter plus de précisions --><br />
=== Decoupling ===<br />
<br />
It is recommended to put one small capacitor for each power supply pin, and some bigger for the whole circuit. When there is multiple power domain decoupling is needed for each one. '''In any case refer''' to the “'''Power supply scheme'''” figure int device '''Datasheet'''. When '''Vcap''' is available, decoupling capacitors need to be attached as close as possible to VCAP pins.<br />
<br>Here is the example of the STM32 L0:<br />
[[File:Decoupling_scheme_example_STM32_L0_DS10689_Rev5_p61.png|600px|thumb|center| Decoupling scheme example; STM32 L0]]<br />
<br />
;PCB recommendations: <br />
The PCB layout play an important role in the quality of decoupling, refer to the '''Getting started application note,''' dedicated to your device, to get precises guidelines.<br />
<br />
=== Power supply supervisor ===<br />
<span id="Power supply supervisor"></span><br />
'' this chapter is mainly a copy of the chapter 2.2 of the application note : AN5307 - Rev 6, ch 2.2 ''<br />
<br>To ensure that that the MCU does not run under the minimum operating voltage, STM32 devices have integrated voltage monitoring circuitry.<br />
==== Power-on reset (POR)/power-down reset (PDR) ====<br />
The device remains in reset mode while VDD is below a specified threshold, VPOR/PDR, generally around 1.7V-1.8V. For more details concerning t<sub>RSTTEMPO</sub> and VPOR/VPDR threshold value refer to the “electrical characteristics” and “reset and power control block characteristics table” in the mcu datasheet. <br />
<br>On some devices the PDR<sub>ON</sub> pin is available. In this case the power supply supervisor is enabled by holding PDR<sub>ON</sub> high and can be disabled by pulling down PDR<sub>ON</sub>. Otherwise, if not available the power supply supervisor is always enabled.<br />
<br>If power supply supervisor is disabled, an external power supply supervisor '''must''' monitor VDD and control the NRST pin. The device must be maintained in reset mode as long as VDD is '''below the minimum operating voltage''' specified in the datasheet. <!-- TODO The implemented circuit is illustrated in Figure 9-->.<br />
<br>The supply ranges which never go below VPOR/PDR are managed more effectively using the internal circuitry (no additional components are needed, thanks to the fully embedded reset controller). When the embedded power supply supervisor is off, the following integrated features are no longer supported:<br />
* the integrated power-on reset (POR) / power-down reset (PDR) circuitry is disabled.<br />
* the brown out reset (BOR) circuitry must be disabled.<br />
* the embedded programmable voltage detector (PVD) is disabled.<br />
* VBAT functionality is no longer available and VBAT pin must be connected to VDD.<br />
==== Brownout reset (BOR) ====<br />
The BOR keeps the system under reset until the VDD supply voltage reaches the selected VBOR threshold.<br />
<br>BOR is enabled through the option bytes, as well as VBOR threshold. Different BOR levels are available depending on the device. It is used to set a higher threshold than VPOR and can be modified dynamically, see the device reference manual or datasheet for more information.<br />
<br />
==== Programmable voltage detector (PVD) ====<br />
The PVD is an additional voltage monitoring system. It sets a flag that tells if VDD is above or below the selected threshold. PVD is activated and the threshold VPVD selected through registers, see the device reference manual or datasheet for more information.<br />
<br>It can be connected to the EXTI to trigger interruption when VDD drops below the selected threshold or rise above the threshold. As an example, the service routine could perform emergency shutdown tasks such as saving data in backup domain.<br />
<br>Analog voltage detector (AVD) The AVD can be used to monitor VDDA power supply like the PVD.<br />
<br />
==== System reset ====<br />
A system reset sets all the registers to their default values except the reset flags in the clock controller RCC<sub>RSR</sub> register and the registers in the backup domain. A system reset is generated when one of the following events occurs: <br />
* A low level on the NRST pin (external reset) <br />
* Window watchdog end of count condition (WWDG reset) <br />
* Independent watchdog end of count condition (IWDG reset) <br />
* A software reset (Software reset) <br />
* A low-power management reset. <br />
[[File:STM32_power_supply_supervisors_ST_DocID026156_Rev_2_p13.svg|600px|thumb|center| STM32 power supply supervisors]]<br />
<br />
=== Multiple power supplies rules ===<br />
==== Voltage differences ====<br />
Different power domains have constraints about voltage differences. The datasheet might specify that one needs to be higher than the second one, or the voltage difference might not exceed a certain value. <br />
For example, VDDA vs VDDX for STM32L0:<br />
[[File:Extract_from_STM32L073_dataseet_ST_DS10685_Rev_7_p66.PNG|600px|thumb|center| extract from STM32L073 dataseet; DS10685 Rev 7 p66; table 23]]<br />
<br />
Here VDDx vs VDD for STM32U5: <br />
[[File:VDDX_vs_VDD_STM32U535_DS14217_Rev_4_p_35_fig_4.png|600px|thumb|center| VDDX vs VDD STM32U535; DS14217 Rev 4 p 35; fig 4]]<br />
<br />
==== Circuit exemples ====<br />
A simple way to ensure that a supply voltage ''Vddx'' doesn’t rise before ''Vdd'', is to wire power good signal from ''Vdd'' regulator to enable signal of ''Vddx'' regulator as shown in Figure below Sequencing power rails, chained regulators. <br />
[[File:Sequencing_power_rails_chained_regulators_schematic.svg|600px|thumb|center| Sequencing power rails, chained regulators]]<br />
<br />
Also be sure that Vddx regulators has proper discharge feature to prevent any Vddx staying above Vdd during power down phase.<br />
<br>In Figure below delayed Vddusb5 graph, an example of Figure 30 applied on Vdd5USB. Se during power down phase Vdd5USB must discharge fast enough to reach 1V before Vdd.<br />
[[File:delayed_Vddusb5_graph_2.svg|600px|thumb|center| delayed Vddusb5 graph]]</div>M Dbhttps://wiki.st.com/stm32mcu/wiki/External_memory_Loader:Introduction_to_External_memory_LoaderExternal memory Loader:Introduction to External memory Loader2024-02-01T16:07:48Z<p>Wafa Kouka: </p>
<hr />
<div>==External Memory Loader==<br />
===What is a loader ?===<br />
A "loader" is a set of functions grouped together in a binary that are individually called by a tool to perform actions on dedicated memory. The loader is loaded by the tools inside a RAM space and its execution is managed by the tool, the loader specifity are :<br />
<br />
* '''binary ''' : loader is a binary using a continuos RAM area to store code and data.<br />
* '''loader file ''' : the loader file is an ELF file (contains symbol information)<br />
* '''interrupt ''': they are disabled this is a recommandation for the tool to keep control over the execution flow.<br />
* '''Stack Pointer ''' : the loader doesn't allocate memory space to the stack.<br />
* '''RAM Buffer ''' : there is no space allocated to store the data to be written.<br />
* '''Map mode ''' : this is the preferred mode for checking written data.<br />
<br />
===Architecture of External Memory Loader===<br />
The External Memory Loader is a middleware for STM32 that consists of a core component and target entry points for the loader.<br><br />
The core contains two components:<br />
*'''memory_wrapper''' : an abstraction layer poviding basic memory services based on the usage of the middleware external memory manager.<br />
*'''Systick management''' : a Systick management wrapper to make systick managament functionnal without interrupt, the main reason for this module is to keep functionnal HAL management of timing.<br />
{{ReviewsComments|-- [[User:Escoda Michael|Escoda Michael]] ([[User talk:Escoda Michael|talk]]) 14:16, 30 January 2024 (CET)<br />Please use primary ST colors}}<br />
[[File:loader2.png|1000px]]<br />
<br />
===Loader Mechanism in IDEs===<br />
<br />
<br />
To run a loader, you need three essential components: a tool such as an IDE (IAR, KEIL, CubeIDE) or a loader program (CubeProgrammer), a binary format loader containing code and symbol information, and an STM32 board with embedded external Flash memory.<br />
<br />
The loader tool operates in the following steps:<br />
<br />
* Read the loader file to retrieve function and memory information.<br />
* Load the code into the internal RAM of the STM32.<br />
* Allocate space in RAM for RAM buffer and Stack.<br />
* Use loader functions to load firmware into external memory.<br />
{{ReviewsComments|-- [[User:Escoda Michael|Escoda Michael]] ([[User talk:Escoda Michael|talk]]) 14:16, 30 January 2024 (CET)<br />Please ST colors}}<br />
[[File:Lmec.png|1000px]]<br />
<big><big>'''Main loader operations'''</big></big><br><br><br />
The main loader operations are :<br />
* Initialize the external memory.<br />
* Erase memory by sector or by masserase.<br />
* Write buffer into external memory.<br />
* Verify external memory downloaded content.<br />
<br />
<br />
====EWARM (IAR IDE)====<br />
'''IAR loader configuration file''':<br><br><br />
*'''flash memory configuration file (.flash) ''': is an XML file that describe the memory elements to the debugger These include, for example, the flash memory base address, the flash loader name, and flash memory characteristics, such as block and page size. The file also specifies which flash loader to use.<br />
[[File:flash.png|1000px]]<br />
*'''flash memory system configuration file (.board) ''': is an XML file that specifies the information needed to perform flash loading for a specific board. You can prepare this file in advance for various development boards, and create or modify the file in the IAR Embedded Workbench IDE.<br />
[[File:board1.png|1000px]]<br />
{{ReviewsComments|-- [[User:Escoda Michael|Escoda Michael]] ([[User talk:Escoda Michael|talk]]) 14:16, 30 January 2024 (CET)<br />The picture is blury}}<br />
<br />
====STM32CUBE====<br />
'''STM32CUBE loader configuration file :''':<br><br><br />
No configuration needed, the ExtMemLoader will be copied automatically under STM32CubeProgrammer using post build.<br><br />
[[File:cube.png|1000px]]<br />
{{Info|Using STM32Cubeprogrammer, it is possible to create a loader for it through three different Integrated Development Environments (IDEs). It is important to note that for each IDE, the corresponding IDE should be used. }}<br />
====MDK-ARM (keil IDE)====<br />
'''MDK-ARM loader configuration file :''':<br><br><br />
The generated *.FLM file needs to be added to the Pack with Device Support, so that it is available to the tool user for programming his device. Usually, a directory Flash is created and the algorithm is saved in this directory.<br />
The algorithm is specified within the the /package/devices/family level:<br><br />
[[File:keil1.png|1200px]]<br />
*The argument start specifies the base address for the Flash programming algorithm.<br><br />
*The argument size specifies the size covered by the Flash programming algorithm. End address = start + size - 1.<br><br />
*The argument default specifies whether a Flash programming algorithm is set as the default algorithm in a project (when true).<br></div>Wafa Koukahttps://wiki.st.com/stm32mcu/wiki/External_memory_Manager:_Introduction_to_External_memory_ManagerExternal memory Manager: Introduction to External memory Manager2024-02-01T16:05:17Z<p>Wafa Kouka: Created page with "==External Memory Manager== ===Introduction=== The External Memory Manager module has been implemented to assist in the development of ROMLess applications, but of course it c..."</p>
<hr />
<div>==External Memory Manager==<br />
===Introduction===<br />
The External Memory Manager module has been implemented to assist in the development of ROMLess applications, but of course it can also be used on other platforms. It is an STM32 middleware providing two services:<br><br />
*A unique API to access all types of memory.<br><br />
*A BOOT system to launch an application stored on an external memory.<br><br />
<br />
===External Memory Manager Driver===<br />
The External Memory Manager provides a unique interface for all supported memories. It is the driver part that is responsible for adapting the request to the context of the physical memory as well as the hardware used. Depending on the type of memory, it is possible that certain services may not make sense or may not be of interest. In this case, the APIs will return an error code EXTMEM_ERROR_NOTSUPPORTED.<br><br />
<br />
{| class="wikitable" style="border: none; width: 80%; background: none; border: 1px solid darkgray;margin-left: auto; margin-right: auto;"<br />
|-<br />
! API name !! Description!! Parameters<br />
|-<br />
| EXTMEM_Init|| This function manages the memory uninitialization|| uint32_t MemId : Memory ID<br />
uint32_t ClockInput : clock value apply on the HW link used by the memory<br />
|-<br />
| EXTMEM_DeInit || This function manages the memory uninitialization||uint32_t MemId : Memory ID.<br />
|-<br />
| EXTMEM_Read || This function manages the memory reading || uint32_t MemId : Memory ID<br />
uint32_t Address <br />
uint8_t* Data <br />
uint32_t Size <br />
|-<br />
| EXTMEM_Write|| This function manages the memory writing || uint32_t MemId : Memory ID<br />
uint32_t Address <br />
const uint8_t* Data <br />
uint32_t Size <br />
|-<br />
| EXTMEM_WriteInMappedMode|| This function manage the memory writting in mapped mode || uint32_t MemId : Memory ID<br />
uint32_t Address :<br />
const uint8_t* Data :<br />
uint32_t Size :<br />
|-<br />
| EXTMEM_EraseSector|| This function manage the memory sector erase|| uint32_t MemId : Memory ID<br />
uint32_t Address <br />
uint32_t Size <br />
|-<br />
| EXTMEM_EraseAll|| This function perform the complete erase of the memory|| uint32_t MemId : Memory ID<br />
|-<br />
| EXTMEM_GetInfo|| This function manage the memory uninitialization||uint32_t MemId : Memory ID<br />
void *Info :<br />
|-<br />
| EXTMEM_MemoryMappedMode|| This function enables/disable the map mode || uint32_t MemId : Memory ID<br />
EXTMEM_StateTypeDef State :<br />
|-<br />
| EXTMEM_GetMapAddress || This function returns the map address of the memory|| uint32_t MemId : Memory ID<br />
uint32_t *BaseAddress : returned value containing the map address<br />
|-<br />
|}<br />
===Supported memories ===<br />
External memory manager is designed to support a variety of memory types, including:<br />
* '''NOR_SFDP (Serial Flash Discovery Protocol)''' <br />
* '''PSRAM'''<br />
* '''SDCARD''' <br />
===Boot Manager===<br />
The role of the BOOT is to start the execution of the application and it supports tow modes :<br />
* '''XIP ''' : exectue In Place the application is executed from the external memory.<br />
* ''' LRUN ''': Load and RUN the application is loaded from an external memory into internal or external memory and runs form that memory.<br />
<br />
The service is available through a single BOOT_Application API. The service can be called only after initializing the memories.<br />
<br />
<br />
====XIP Process====<br />
<br />
* The XiP process is based on code execution directly from the external non-volatile memory that is used for codestorage. This execution model requires memory-mapped support to grant the CPU with direct access to the executed-code user application. <br><br />
[[File: XIP.png||600px]]<br />
====LRUN Process====<br />
* Load and run is a process where an application is loaded into internal memory and then executed. In this process, the application code is first loaded into RAM .Once the code is loaded into RAM, the processor can execute it.<br><br />
[[File: LRUN.png|600px]]</div>Wafa Koukahttps://wiki.st.com/stm32mcu/wiki/ExternalmemoryLoader:Introduction_to_External_memory_LoaderExternalmemoryLoader:Introduction to External memory Loader2024-01-30T14:12:05Z<p>Escoda Michael: </p>
<hr />
<div>==External Memory Loader==<br />
===Introduction===<br />
External Memory Loader is an STM32 middleware helping to develop memory loaders for different targets entry point:<br />
<br />
* ''' EWARM ''' : contains the target entry points definition to build a loader compatible with the IAR embedded workbench IDE<br />
* '''MDK-ARM ''': contains the target entry points definition to build a laoder compatible with KEIL uVision 5 IDE.<br />
* '''STM32Cube ''' : contains the target entry points definition to build a loader compatible with the STM32Cube tools : STM32CubeProgrammer and STM32CubeIDE<br />
===What is a loader ?===<br />
A "loader" is a set of functions grouped together in a binary that are individually called by a tool to perform actions on dedicated memory. The loader is loaded by the tools inside a RAM space and its execution is managed by the tool, the loader specifity are :<br />
<br />
* '''binary ''' : loader is a binary using a continuos RAM area to store code and data.<br />
* '''loader file ''' : the loader file is an ELF file (contains symbol information)<br />
* '''interrupt ''': they are disabled this is a recommandation for the tool to keep control over the execution flow.<br />
* '''Stack Pointer ''' : the loader doesn't allocate memory space to the stack.<br />
* '''RAM Buffer ''' : there is no space allocated to store the data to be written.<br />
* '''Map mode ''' : this is the preferred mode for checking written data.<br />
<br />
===Architecture of External Memory Loader===<br />
The External Memory Loader is a middleware for STM32 that consists of a core component and target entry points for the loader.<br><br />
The core contains two components:<br />
*'''memory_wrapper''' : an abstraction layer poviding basic memory services based on the usage of the middleware external memory manager.<br />
*'''Systick management''' : a Systick management wrapper to make systick managament functionnal without interrupt, the main reason for this module is to keep functionnal HAL management of timing.<br />
<br />
[[File:loader2.png|1000px]]<br />
<br />
===Loader Mechanism in IDEs===<br />
<br />
<br />
To run a loader, you need three essential components: a tool such as an IDE (IAR, KEIL, CubeIDE) or a loader program (CubeProgrammer), a binary format loader containing code and symbol information, and an STM32 board with embedded external Flash memory.<br />
<br />
The loader tool operates in the following steps:<br />
<br />
* Read the loader file to retrieve function and memory information.<br />
* Load the code into the internal RAM of the STM32.<br />
* Allocate space in RAM for RAM buffer and Stack.<br />
* Use loader functions to load firmware into external memory.<br />
<br />
[[File:Lmec.png|1000px]]<br />
<big><big>'''Main loader operations'''</big></big><br><br><br />
The main loader operations are :<br />
* Initialize the external memory.<br />
* Erase memory by sector or by masserase.<br />
* Write buffer into external memory.<br />
* Verify external memory downloaded content.<br />
<br />
<br />
====EWARM (IAR IDE)====<br />
'''IAR loader configuration file''':<br><br><br />
*'''flash memory configuration file (.flash) ''': is an XML file that describe the memory elements to the debugger These include, for example, the flash memory base address, the flash loader name, and flash memory characteristics, such as block and page size. The file also specifies which flash loader to use.<br />
[[File:flash.png|1000px]]<br />
*'''flash memory system configuration file (.board) ''': is an XML file that specifies the information needed to perform flash loading for a specific board. You can prepare this file in advance for various development boards, and create or modify the file in the IAR Embedded Workbench IDE.<br />
[[File:board1.png|1000px]]<br />
{{ReviewsComments|-- [[User:Escoda Michael|Escoda Michael]] ([[User talk:Escoda Michael|talk]]) 14:16, 30 January 2024 (CET)<br />The picture is blury}}<br />
<br />
====STM32CUBE====<br />
'''STM32CUBE loader configuration file :''':<br><br><br />
No configuration needed, the ExtMemLoader will be copied automatically under STM32CubeProgrammer using post build.<br><br />
[[File:cube.png|1000px]]<br />
====MDK-ARM (keil IDE)====<br />
'''MDK-ARM loader configuration file :''':<br><br><br />
The generated *.FLM file needs to be added to the Pack with Device Support, so that it is available to the tool user for programming his device. Usually, a directory Flash is created and the algorithm is saved in this directory.<br />
The algorithm is specified within the the /package/devices/family level:<br><br />
[[File:keil1.png|1000px]]<br />
*The argument start specifies the base address for the Flash programming algorithm.<br><br />
*The argument size specifies the size covered by the Flash programming algorithm. End address = start + size - 1.<br><br />
*The argument default specifies whether a Flash programming algorithm is set as the default algorithm in a project (when true).<br></div>Wafa Koukahttps://wiki.st.com/stm32mcu/wiki/ExternalmemoryManager:Introduction_to_External_memory_ManagerExternalmemoryManager:Introduction to External memory Manager2024-01-30T13:54:04Z<p>Wafa Kouka: Created page with "==External Memory Manager== ===Introduction=== The External Memory Manager module has been implemented to assist in the development of ROMLess applications, but of course it c..."</p>
<hr />
<div>==External Memory Manager==<br />
===Introduction===<br />
The External Memory Manager module has been implemented to assist in the development of ROMLess applications, but of course it can also be used on other platforms. It is an STM32 middleware providing two services:<br><br />
*A unique API to access all types of memory.<br><br />
*A BOOT system to launch an application stored on an external memory.<br><br />
<br />
===External Memory Manager Driver===<br />
The External Memory Manager provides a unique interface for all supported memories. It is the driver part that is responsible for adapting the request to the context of the physical memory as well as the hardware used. Depending on the type of memory, it is possible that certain services may not make sense or may not be of interest. In this case, the APIs will return an error code EXTMEM_ERROR_NOTSUPPORTED.<br><br />
<br />
{| class="wikitable" style="border: none; width: 80%; background: none; border: 1px solid darkgray;margin-left: auto; margin-right: auto;"<br />
|-<br />
! API name !! Description!! Parameters<br />
|-<br />
| EXTMEM_Init|| This function manages the memory uninitialization|| uint32_t MemId : Memory ID<br />
uint32_t ClockInput : clock value apply on the HW link used by the memory<br />
|-<br />
| EXTMEM_DeInit || This function manages the memory uninitialization||uint32_t MemId : Memory ID.<br />
|-<br />
| EXTMEM_Read || This function manages the memory reading || uint32_t MemId : Memory ID<br />
uint32_t Address <br />
uint8_t* Data <br />
uint32_t Size <br />
|-<br />
| EXTMEM_Write|| This function manages the memory writing || uint32_t MemId : Memory ID<br />
uint32_t Address <br />
const uint8_t* Data <br />
uint32_t Size <br />
|-<br />
| EXTMEM_WriteInMappedMode|| This function manage the memory writting in mapped mode || uint32_t MemId : Memory ID<br />
uint32_t Address :<br />
const uint8_t* Data :<br />
uint32_t Size :<br />
|-<br />
| EXTMEM_EraseSector|| This function manage the memory sector erase|| uint32_t MemId : Memory ID<br />
uint32_t Address <br />
uint32_t Size <br />
|-<br />
| EXTMEM_EraseAll|| This function perform the complete erase of the memory|| uint32_t MemId : Memory ID<br />
|-<br />
| EXTMEM_GetInfo|| This function manage the memory uninitialization||uint32_t MemId : Memory ID<br />
void *Info :<br />
|-<br />
| EXTMEM_MemoryMappedMode|| This function enables/disable the map mode || uint32_t MemId : Memory ID<br />
EXTMEM_StateTypeDef State :<br />
|-<br />
| EXTMEM_GetMapAddress || This function returns the map address of the memory|| uint32_t MemId : Memory ID<br />
uint32_t *BaseAddress : returned value containing the map address<br />
|-<br />
|}<br />
===Supported memories ===<br />
External memory manager is designed to support a variety of memory types, including:<br />
* '''NOR_SFDP (Serial Flash Discovery Protocol)''' <br />
* '''PSRAM'''<br />
* '''SDCARD''' <br />
===Boot Manager===<br />
The role of the BOOT is to start the execution of the application and it supports tow modes :<br />
* '''XIP ''' : exectue In Place the application is executed from the external memory.<br />
* ''' LRUN ''': Load and RUN the application is loaded from an external memory into internal or external memory and runs form that memory.<br />
<br />
The service is available through a single BOOT_Application API. The service can be called only after initializing the memories.<br />
<br />
<br />
====XIP Process====<br />
<br />
* The XiP process is based on code execution directly from the external non-volatile memory that is used for codestorage. This execution model requires memory-mapped support to grant the CPU with direct access to the executed-code user application. <br><br />
[[File: XIP.png||600px]]<br />
====LRUN Process====<br />
* Load and run is a process where an application is loaded into internal memory and then executed. In this process, the application code is first loaded into RAM .Once the code is loaded into RAM, the processor can execute it.<br><br />
[[File: LRUN.png|600px]]</div>Wafa Koukahttps://wiki.st.com/stm32mcu/wiki/Introduction_to_External_memory_managerIntroduction to External memory manager2024-01-30T13:38:15Z<p>Wafa Kouka: Created page with "==External Memory Manager== ===Introduction=== The External Memory Manager module has been implemented to assist in the development of ROMLess applications, but of course it c..."</p>
<hr />
<div>==External Memory Manager==<br />
===Introduction===<br />
The External Memory Manager module has been implemented to assist in the development of ROMLess applications, but of course it can also be used on other platforms. It is an STM32 middleware providing two services:<br><br />
*A unique API to access all types of memory.<br><br />
*A BOOT system to launch an application stored on an external memory.<br><br />
<br />
===External Memory Manager Driver===<br />
The External Memory Manager provides a unique interface for all supported memories. It is the driver part that is responsible for adapting the request to the context of the physical memory as well as the hardware used. Depending on the type of memory, it is possible that certain services may not make sense or may not be of interest. In this case, the APIs will return an error code EXTMEM_ERROR_NOTSUPPORTED.<br><br />
<br />
{| class="wikitable" style="border: none; width: 80%; background: none; border: 1px solid darkgray;margin-left: auto; margin-right: auto;"<br />
|-<br />
! API name !! Description!! Parameters<br />
|-<br />
| EXTMEM_Init|| This function manages the memory uninitialization|| uint32_t MemId : Memory ID<br />
uint32_t ClockInput : clock value apply on the HW link used by the memory<br />
|-<br />
| EXTMEM_DeInit || This function manages the memory uninitialization||uint32_t MemId : Memory ID.<br />
|-<br />
| EXTMEM_Read || This function manages the memory reading || uint32_t MemId : Memory ID<br />
uint32_t Address <br />
uint8_t* Data <br />
uint32_t Size <br />
|-<br />
| EXTMEM_Write|| This function manages the memory writing || uint32_t MemId : Memory ID<br />
uint32_t Address <br />
const uint8_t* Data <br />
uint32_t Size <br />
|-<br />
| EXTMEM_WriteInMappedMode|| This function manage the memory writting in mapped mode || uint32_t MemId : Memory ID<br />
uint32_t Address :<br />
const uint8_t* Data :<br />
uint32_t Size :<br />
|-<br />
| EXTMEM_EraseSector|| This function manage the memory sector erase|| uint32_t MemId : Memory ID<br />
uint32_t Address <br />
uint32_t Size <br />
|-<br />
| EXTMEM_EraseAll|| This function perform the complete erase of the memory|| uint32_t MemId : Memory ID<br />
|-<br />
| EXTMEM_GetInfo|| This function manage the memory uninitialization||uint32_t MemId : Memory ID<br />
void *Info :<br />
|-<br />
| EXTMEM_MemoryMappedMode|| This function enables/disable the map mode || uint32_t MemId : Memory ID<br />
EXTMEM_StateTypeDef State :<br />
|-<br />
| EXTMEM_GetMapAddress || This function returns the map address of the memory|| uint32_t MemId : Memory ID<br />
uint32_t *BaseAddress : returned value containing the map address<br />
|-<br />
|}<br />
===Supported memories ===<br />
External memory manager is designed to support a variety of memory types, including:<br />
* '''NOR_SFDP (Serial Flash Discovery Protocol)''' <br />
* '''PSRAM'''<br />
* '''SDCARD''' <br />
===Boot Manager===<br />
The role of the BOOT is to start the execution of the application and it supports tow modes :<br />
* '''XIP ''' : exectue In Place the application is executed from the external memory.<br />
* ''' LRUN ''': Load and RUN the application is loaded from an external memory into internal or external memory and runs form that memory.<br />
<br />
The service is available through a single BOOT_Application API. The service can be called only after initializing the memories.<br />
<br />
<br />
====XIP Process====<br />
<br />
* The XiP process is based on code execution directly from the external non-volatile memory that is used for codestorage. This execution model requires memory-mapped support to grant the CPU with direct access to the executed-code user application. <br><br />
[[File: XIP.png||600px]]<br />
====LRUN Process====<br />
* Load and run is a process where an application is loaded into internal memory and then executed. In this process, the application code is first loaded into RAM .Once the code is loaded into RAM, the processor can execute it.<br><br />
[[File: LRUN.png|600px]]</div>Wafa Koukahttps://wiki.st.com/stm32mcu/wiki/Getting_started_with_External_memory_Manager_and_External_memory_loaderGetting started with External memory Manager and External memory loader2024-01-17T13:01:30Z<p>Wafa Kouka: </p>
<hr />
<div><big><big>'''Target description'''</big></big><br><br><br />
'''The first part of the article ''':<br><br><br />
This article introduces the '''External Memory Manager ''' and '''External Memory Loader ''' middleware features in a bootflash application for the STM32H7R/H7S product in order to: <br />
*Provide an API that allows access to all types of memory.<br><br />
*Launch an application that is stored on an external memory .<br><br />
*Generate an External memory loader file.<br><br />
<br />
'''The second part of the article ''':<br><br><br />
Furthermore, the article presents a detailed tutorial on the implementation of External Memory Manager and External Memory Loader middleware functionalities. The article also features a configuration sample utilizing STM32CubeMX, which can be used as a reference to apply these functionalities to:<br />
*Configure the External Memory manager.<br><br />
*Configure the External Memory Loader.<br><br />
*Build a BootFlash application.<br><br />
<br />
<big><big>'''Hardware'''</big></big><br><br />
* STM32H7R/H7S<br />
<br />
<big><big>'''Software'''</big></big><br><br />
* An IDE (IAR, KEIL, STM32CubeIDE).<br><br />
* Software tool for STM32 products programming.<br><br />
<big><big>'''Literature'''</big></big><br><br />
* Getting started with Octo-SPI and Hexadeca-SPI Interface onSTM32microcontroller<ref>[https://www.st.com/resource/en/application_note/an5050-getting-started-with-octospi-and-hexadecaspi-interface-on-stm32-microcontrollers-stmicroelectronics.pdf Getting started with Octo-SPI and Hexadeca-SPI Interface on STM32 microcontrollers]</ref> <br />
<br />
== What is a BootFlash product ==<br />
=== Definition ===<br />
A BootFlash product is a product with small embedded Flash for an initial boot step and the application is located in an external memory.<br />
<br />
=== What is a BootFlash application?===<br />
The STM32CubeMx tool provides the ability to create a BootFlash application, which uses the external memory manager and external memory loading middleware, to create a boot system capable of launching an application stored on external memory.<br><br><br />
The project structure of a BootFlash application is divided into three different contexts:<br><br />
*'''Boot''': Boot code to run from Internal Flash.<br><br />
*'''Appli''': Application code to run from External Flash.<br><br />
*'''ExtMemLoader''': code dedicated to generate the External Loader.<br><br />
[[File:3.png||1000px]]<br><br />
The image below shows the STM32H7Rx/H7Sx application architecture based on the use of two middleware; External Memory Manager and External Memory Loader.<br><br />
[[File:bldiag.png||1000px]]<br><br />
<br />
=== How to create a BootFlash project with the STM32 ecosystem===<br />
==== STM32CubeMX Ecosystem Tool====<br />
STM32CubeMX is a graphical tool that allows a very easy configuration of STM32 microcontrollers and microprocessors, as well as the generation of the corresponding initialization C code for the Arm® Cortex®-M core or a partial Linux® Device Tree for Arm® Cortex®-A core, through a step-by-step process.<br> Additionally, STM32CubeMX also offers integration with the following middleware:<br />
* ''' External Memory Manager''' <br><br />
* ''' External Memory Loader''' <br><br />
[[File:mx.png|800px]]<br />
<br />
====External Memory Manager====<br />
The External Memory Manager module has been implemented to assist in the development of BootFlash applications on STM32H7R/H7S, but it can also be used on other platforms. It is an STM32 middleware providing two services:<br><br />
*A unique API to access all types of memory.<br><br />
*A Boot system to launch an application stored on an external memory.<br><br />
<br><br />
You can access an overview of the STM32 External Memory Manager by clicking on the link below.<br><br />
'''[[External_memory_Manager: Introduction_to_External_memory_Manager |External memory Manager]]'''<br><br />
<br />
====External Memory Loader====<br />
The External Memory Loader is a middleware for STM32 that assists in developing various target loader entry points. It includes three target entry point definitions for building a loader compatible with different IDEs: <br><br />
* ''' EWARM ''' : contains the target entry points definition to build a loader compatible with the IAR Embedded Workbench IDE<br />
* '''MDK-ARM ''': contains the target entry points definition to build a loader compatible with KEIL µVision 5 IDE.<br />
* '''STM32Cube ''' : contains the target entry points definition to build a loader compatible with the STM32Cube tools : STM32CubeProgrammer and STM32CubeIDE.<br />
The External Memory Loader relies on the ExtMem_Manager services to interface with the memory and IDEs entry points to perform standard operations like initialization, reading, writing, erasing, mass erasing and memory mapping.<br><br />
<br><br />
You can access an overview of the STM32 External Memory Loader by clicking on the link below.<br><br />
'''[[External_memory_Loader:Introduction_to_External_memory_Loader |External memory Loader]]'''<br />
<br />
==STM32CubeMX BootFlash Application Configuration==<br />
To get started on the project, it is necessary to use the STM32H7S7L8H6H board. <br><br />
1. Select this board by referring to the Board Selector that is displayed in the figure below. <br><br />
[[File:FS1.png|1000px]]<br />
<br />
2. As the project manager, ensure that you name the project and verify that all three subprojects are selected.<br><br />
[[File:subproject1.png|1000px]]<br />
====Boot subproject Configuration====<br />
The BootFlash Boot subproject is mainly built using the External Memory Manager middleware and this project is responsible for three operations:<br><br />
* System initialization.<br><br />
* Initialization of external memory(ies).<br><br />
* Application start (XIP (eXecute In Place) or LRUN (Load & Run)).<br><br />
<br><br />
'''''STEP1''''': Clock configuration.<br><br />
1.To reach the highest performance, set the clock to max frequency for both Boot and ExtMemLoader subprojects :<br><br />
<br />
Select the system clock at 600 Mhz: <br />
<br />
* Select HSI from PLL1 Source Mux.<br><br />
* Select PLLCLK from System Clock Mux.<br><br />
* Set HCLK to 600 MHz.<br><br />
[[File:clk1.png|1000px]]<br />
<br />
2.Set the XSPI2 clock to 200 Mhz and lock it to 200 Mhz.<br><br />
<br />
[[File:clk4.png|600px]]<br />
<br />
<br><br />
'''''STEP2''''': Configure the arm® Cortex®-M7 MPU to define :<br><br />
* A background region to set default attributes for all regions and prevent speculative accesses on Normal memory type.<br> <br />
* A region of RAM to store non cacheable buffer.<br> <br />
1. Enable ICACHE.<br><br />
2. Enable DCACHE.<br><br />
3. Enable MPU.<br><br />
<br />
[[File:mpu.png|600px]]<br />
<br />
<br><br />
'''''STEP3''''': To configure the external memory peripheral, select the peripheral connected to the external memory and select the Boot context.<br><br />
1. In this example, XSPI2 instance corresponds to the interface to the serial NOR SFDP memory on H7RS Discovery board (MB1736-HS7S78-DK).<br><br />
<br />
[[File:xspi22.png|400px]]<br />
<br />
2. Once the XSPI2 clock configuration has been done, the user must configure the XSPI2 depending on the used external memory<br><br />
* Select Octo SPI mode .<br><br />
* Select the Port and the Chip Select.<br><br />
* Set the parameters of XSPI2 instance like below to connect NOR SFDP memory.<br><br />
[[File:xspi33.png|600px]]<br />
<br />
<br><br />
'''''STEP4''''': To simplify the use of the External memory manager, select and configure the EXTMEM_MANAGER middleware.<br><br />
<br />
1. Select the EXTMEM_MANAGER middleware .<br><br />
2. Activate the EXTMEM_MANAGER middleware.<br><br />
3. Select XSPI interface.<br><br />
4. Select the driver of NOR SFDP memory.<br><br />
[[File:emm1.png|600px]]<br />
<br />
5.Configure the Boot usecase to eXecute In Place (XIP)<br><br />
[[File:emm6.png|600px]]<br />
<br />
6. Configure the memory data lines interface to 8 lines for octal mode<br><br />
[[File:emm5.png|600px]]<br />
<br />
<br><br />
'''''STEP5''''': Enable IO HSLV.<br><br />
<br />
[[File:ml2.png|600px]]<br />
{{Info|Enabling the SBS IO HSLV has no effect if the option bytes are not correctly set. }}<br />
<br />
====ExtMemLoader subproject Configuration====<br />
<br />
ExtMemLoader is a subproject used to generate a binary library capable of downloading an application to external memory. This binary is called a "Loader" which can be used by the IDE or STM32CubeProgrammer.<br><br />
This system initialization function performs the following operations:<br><br />
<br />
* Initialize the system:<br><br />
** Irq disabling (a loader does not use any irq).<br><br />
** Enable the cache for performance purpose.<br><br />
** Initialize the HAL context.<br><br />
** Disable any ongoing MPU configuration.<br><br />
** Clock configuration with maximum speed.<br><br />
* Initialize the memory <br />
**peripheral associated with the memories.<br><br />
**used the EXTMEM_MANAGER middleware to initialize the memory.<br><br />
<br />
<br><br />
'''''STEP1''''': Configure the External Memory loader.<br><br />
1. Select the External Memory loader middleware.<br><br />
2. Activate the External Memory loader middleware.<br><br />
[[File:ml.png|600px]]<br />
<br />
<br />
====Application subproject Configuration====<br />
The Application context (Appli) is the end user application stored in the external memory and its execution is initiated by the Boot context. This process causes the application to inherit from the configurations made by the Boot context.<br><br />
<br />
{{Info| The scatter file of the application depends on the memories present in the system, STM32CubeMX embeds an algorithm which selects the file according to the EXTMEM_MANAGER configuration done in the Boot subproject. This file is provided as template and can be modified by the application. }}<br />
<br />
In this application, we use the PO1, PO5 LEDs to prepare a simple application and load it into the external NOR-SFDP memory.<br><br />
[[File:app.png|600px]]<br />
<br />
===Compile and flash===<br />
* To view the base address of XSPI2 where the user application is loaded, open the memory view and observe the memory address 0x70000000.<br />
[[File:app1.png|1000px]]<br />
===STM32CubeProgrammer loader file Generation===<br />
To generate STM32CubeProgrammer loader file from the IAR ExtMemLoader project, You should follow the 4 steps below :<br><br />
<br><br />
'''''STEP1''''': Change Defined Symbols C/C++/Assembler preprocessors.<br><br />
[[File:st1.png|1000px]]<br />
<br><br />
'''''STEP2''''': Change the linker file<br><br />
[[File:st2.png|1000px]]<br />
<br><br />
'''''STEP3''''': Set the generated loader in the STM32CubeProgrammer<br><br />
There are two methods available to configure the generated loader in the STM32CubeProgrammer:<br />
* A Manual method to configure the generated loader in the STM32CubeProgrammer : <br><br />
1.Rebuild the ExtMemLoader Project.<br><br />
2.Rename the *.out project to *.stldr.<br><br />
3.Copy the *.stldr into binary path of the STM32CubeProgrammer below :<br> <br />
C:\ProgramFiles\STMicroelectronics\STM32Cube\STM32CubeProgrammer\bin\ExternalLoader\<br><br />
<br />
* An automated method to configure the generated loader in the STM32CubeProgrammer <br />
{{Info| The user is required to run the IDE in administrator mode.}}<br />
1.The postbuild.sh shell script is responsible for automating all the steps that were previously done manually.<br> <br />
[[File:pathbuild.png|700px]]<br> <br />
2. Include the postbuild.sh script in your project's build settings.<br> <br />
[[File:postbuild.png|700px]]<br><br />
4.Launch the STM32CubeProgrammer.<br><br />
5.Connect the board.<br><br />
6.Select the new added loader in the STM32CubeProgrammer.<br> <br />
[[File:prg.png|1000px]]<br />
<br><br />
'''''STEP4''''': Check Application using the new added loader.<br> <br />
[[File:st4.png|1000px]]</div>Wafa Kouka